5–6 GHz Dual-Vector Phase Shifter in 0.18 µm LID CMOS

In this paper, a low power active phase shifter in 0.18 μm CMOS technology, operating from 5 to 6 GHz, for WLAN applications is presented. Design equations for this novel structure, which consists of two current steering stages, transconductance stage and DACs, are derived, thoroughly. This phase shifter has a range of 360° with 5.625° phase resolution. The power consumption is 35 mW. The RMS phase error is only 0.3°. The simulated power gain, input P
_1dB
, and NF are 4 dB, -0.8 dBm and 6 dB, respectively.